Research Summary

My current research is focused on hardware accelerated training for deep learning. The goal of this research is to speed training to enable network architecture search and learning on edge devices. Much of my previous research concerned digital communictation theory, including coding, modulation, and adaptive receiver processing. In many cases, I follow-up research in algorithm development by collaboratiing to consider digital hardware implementation.

USC Hardware Accelerated Learning (HAL) Research Group


Below are some selected publications and patents.

Google Scholar Page

Selected Recent Publications

Iterative and Adaptive Detection/Decoding/Processing (Selected Publications)

Error Correction Coding (Selected Publications)

Wireless Networking (Selected Publications)

Digital Hardware Architectures (Selected Publications)

Selected Patents